{"version":1,"type":"story","url":"https://digestai.news/story/asml-expands-high-na-partnerships-amid-ai-chip-demand","json":"https://digestai.news/story/asml-expands-high-na-partnerships-amid-ai-chip-demand.json","markdown":"https://digestai.news/story/asml-expands-high-na-partnerships-amid-ai-chip-demand.md","slug":"asml-expands-high-na-partnerships-amid-ai-chip-demand","headline":"ASML Adapts High-NA EUV Lithography for Next-Gen Nvidia AI Chips","summary":"Dutch lithography giant ASML is collaborating with major chipmakers to adapt its next-generation High-NA EUV tools for the massive data-center processors designed by Nvidia and other tech firms. The initiative addresses a key limitation of ASML's TWINSCAN EXE:5000 systems, which feature an exposure field half the size of conventional EUV machines. This smaller field poses manufacturing challenges for the increasingly large silicon dies required by advanced AI hardware.\n\nThe urgency of this adaptation is highlighted by the soaring silicon demands of modern AI architectures. According to ASML, Nvidia's 2024 Blackwell system requires 2.5 wafers, whereas the projected 2027 Rubin Ultra system will demand 10 wafers—a fourfold increase in system-level silicon. While Intel has already begun using High-NA EUV for selected layers of its Intel 18A process, ASML expects broader customer insertion of the technology between 2027 and 2028.","keyPoints":["ASML is adapting High-NA EUV tools to overcome a half-size exposure field limitation for large AI processors.","Nvidia's upcoming 2027 Rubin Ultra system is projected to require 10 wafers, up from 2.5 for Blackwell.","Intel has initiated high-volume manufacturing for selected Intel 18A layers using ASML's High-NA EUV systems."],"whyItMatters":"As AI models demand unprecedented computing power, physical chip sizes are expanding. Resolving ASML's High-NA exposure limitations is critical for manufacturing next-generation AI hardware like Nvidia's Rubin architecture, directly impacting the scaling roadmap of global AI infrastructure.","category":{"slug":"hardware","name":"Hardware & Compute","url":"https://digestai.news/category/hardware"},"entities":{"companies":["ASML","Nvidia","Intel","Reuters"],"models":[],"people":[]},"firstPublishedAt":"2026-09-10T05:31:00Z","updatedAt":"2026-09-13T15:01:00Z","sourceCount":6,"hasPrimarySource":false,"sources":[{"outlet":"cryptodaily.co.uk","title":"ASML Plans Larger High-NA EUV Chips for Nvidia-Scale AI Processors","url":"https://cryptodaily.co.uk/2026/09/asml-high-na-euv-larger-ai-chips-nvidia","publishedAt":"2026-09-09T09:00:00Z","type":"press","primary":false,"lead":true},{"outlet":"dqindia.com","title":"Samsung Electronics and ASML expand strategic collaboration for next-generation semiconductor manufacturing","url":"https://dqindia.com/semiconductors/samsung-electronics-and-asml-expand-strategic-collaboration-for-next-generation-semiconductor-manufacturing-12509961","publishedAt":"2026-09-13T15:01:00Z","type":"press","primary":false,"lead":false},{"outlet":"finance.yahoo.com","title":"ASML Expands High-NA Ties With Samsung and Intel as AI Demand Builds","url":"https://finance.yahoo.com/technology/articles/asml-expands-high-na-ties-143900733.html","publishedAt":"2026-09-10T05:31:00Z","type":"press","primary":false,"lead":false},{"outlet":"finance.yahoo.com","title":"ASML Inks Advanced EUV Lithography Deals With Chip Titans TSMC, Samsung","url":"https://finance.yahoo.com/technology/articles/asml-inks-advanced-euv-lithography-040100681.html","publishedAt":"2026-09-09T04:00:00Z","type":"press","primary":false,"lead":false},{"outlet":"thenextweb.com","title":"TSMC backs ASML’s plan for bigger masks so its newest machines can print AI’s biggest chips","url":"https://thenextweb.com/news/asml-tsmc-12-inch-masks-high-na-euv","publishedAt":"2026-09-08T03:17:00Z","type":"press","primary":false,"lead":false},{"outlet":"finance.yahoo.com","title":"ASML Bets Big on AI & Capacity Expansion: Should You Buy the Stock?","url":"https://finance.yahoo.com/technology/ai/articles/asml-bets-big-ai-capacity-152800557.html","publishedAt":"2026-09-07T08:27:00Z","type":"press","primary":false,"lead":false}],"sourceNotes":null,"discussions":[],"thread":null,"cite":{"text":"Digest AI, \"ASML Adapts High-NA EUV Lithography for Next-Gen Nvidia AI Chips\", 10 September 2026, https://digestai.news/story/asml-expands-high-na-partnerships-amid-ai-chip-demand","publisher":"Digest AI","title":"ASML Adapts High-NA EUV Lithography for Next-Gen Nvidia AI Chips","datePublished":"2026-09-10T05:31:00Z","url":"https://digestai.news/story/asml-expands-high-na-partnerships-amid-ai-chip-demand"},"generatedBy":"Written by Digest AI's editorial model from the linked sources; the sources are the record.","license":"Headlines, digests and key points are written by Digest AI and may be quoted with a link to the story page. Linked articles belong to their publishers. Terms: https://digestai.news/terms#reuse"}